Faculty Profiles - SARFRAZ Khawar | The Hong Kong University of Science and Technology

Khawar SARFRAZ

PhD in Electronic and Computer Engineering
The Hong Kong University of Science and Technology, 2016

Lecturer I
Department of Electronic and Computer Engineering

(852) 2358 6097
eesarfraz@ust.hk
Room 2423
Personal Web

Google Scholar

zZ9842wAAAAJ

ORCID

0000-0002-2031-4635

Scopus ID

36983170500

Research Interest Publications Teaching Assignment RPG Supervision

Research Interest

Very large-scale integration (VLSI)
Integrated circuits and systems
Mixed-signal / analog integrated circuit (IC)
Internet of Things (IoT)
Artificial intelligence

Publications

All Years 18 2025 1 2024 1 2023 0 2022 0 2021 1 2020 0 2019 15

2025 1

An Energy Efficient 4-bit SRAM Compute-in-Memory Macro With Tunable Reference Charge Injection SAR ADC

IEEE Transactions on Circuits and Systems I: Regular Papers, article number 11219665
Shah, Ikramullah; Zheng, Huimin; Abdullah, Murad; Sarfraz, Khawar; Chan, Mansun
Article

2024 1

An Efficient 6TP SRAM-Based CIM Macro with Column ADCs for Binarized Neural Networks

IEEE Transactions on Circuits and Systems II: Express Briefs, v. 71, (5), p. 2509-2513
Shah, Ikramullah; Sarfraz, Khawar; Chan, Mansun
Article

2021 1

8.5 A Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm

2021 IEEE International Solid-State Circuits Conference, ISSCC 2021 - Digest of Technical Papers, Institute of Electrical and Electronics Engineers Inc., 2021, p. 134-136article number 9366063
Xu, Danfeng; Kou, Yu; Lai, Paul; Cheng, Zichuan; Cheung, Tze Yin; Moser, Larry; Zhang, Yang; Liu, Xiaolong; Lam, Man Pio; Jia, Haikun; Pan, Quan; Szeto, Wing Hong; Tang, Chi Fai; Mak, Ka Fai; Sarfraz, Khawar; Zhu, Tairan; Kwan, Ming; Au, Emily Yim Lee; Conroy, Cormac; Chan, Kai Keung
Conference paper

2017 2

A 1.2V-to-0.4V 3.2GHz-to-14.3MHz power-efficient 3-port register file in 65-nm CMOS

IEEE Transactions on Circuits and Systems I: Regular Papers, v. 64, (2), p. 360-372, article number 7775079
Sarfraz, Khawar; Chan, Mansun
Article

A 140-mV Variation-Tolerant Deep Sub-Threshold SRAM in 65-nm CMOS

IEEE Journal of Solid-State Circuits, v. 52, (8), p. 2215-2220, article number 7954017
Sarfraz, Khawar; He, Jin; Chan, Mansun
Article

2016 5

A compact low-power 4-port register file with grounded write bitlines and single-ended read operations

Integration, the VLSI Journal, v. 55, p. 12-21
Sarfraz, Khawar; Chan, Mansun
Article

Modeling CNTFET Performance Variation Due to Spatial Distribution of Carbon Nanotubes

IEEE Transactions on Electron Devices, v. 63, (9), p. 3776-3781, article number 7517285
Ahmed, Zubair; Zhang, Lining; Sarfraz, Khawar; Chan, Mansun
Article

A voltage-scalable zero-delay-overhead scheme for standby power reduction in dynamic register files

2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016, Institute of Electrical and Electronics Engineers Inc., 2016, article number 7869951
Sarfraz, Khawar; Chan, Mansun
Conference paper

Modeling spatial distribution induced variability in CNT array based FETs

Paper presented at 21st Asia and South Pacific Design Automation Conference (ASP-DAC 2016)
Chan, Man Sun; Sarfraz, Khawar; Zhang, Lining
Conference paper

Nanoscale register file circuit design - Challenges and opportunities

Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015 / edited by Ren Junyan; Tang Ting-Ao; Ye Fan; Yu Huihua. Institute of Electrical and Electronics Engineers Inc., 2016, article number 7516882
Sarfraz, Khawar; Chan, Mansun
Conference paper

2015 3

A 65nm 3.2GHz 44.2mW Low-V_t register file with robust low-capacitance dynamic local bitlines

ESSCIRC 2015 - Proceedings of the 41st European Solid-State Circuits Conference / edited by Dielacher Franz; Pribyl Wolfgang; Hueber Gernot. IEEE Computer Society, 2015, p. 331-334article number 7313894
Sarfraz, Khawar; Chan, Mansun
Conference paper

An area-efficient 1.5-GHz dual-V_DD 4-port register file for real-time microprocessors

Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015, Institute of Electrical and Electronics Engineers Inc., 2015, p. 201-204article number 7285085
Sarfraz, Khawar; Chan, Mansun
Conference paper

Write ability enhancement techniques for L1 cache on next-generation IBM POWER^TM processors

Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015, Institute of Electrical and Electronics Engineers Inc., 2015, p. 621-624article number 7285192
Sarfraz, Khawar; Chan, Mansun
Conference paper

2014 2

A low-noise local bitline technique for dual-Vt register files

2014 IEEE Faible Tension Faible Consommation, FTFC 2014, IEEE Computer Society, 2014, article number 6828602
Sarfraz, Khawar; Chan, Mansun
Conference paper

Low voltage SRAM design using tunneling regime of CNTFET

Proceedings of the IEEE Conference on Nanotechnology, Institute of Electrical and Electronics Engineers Inc., 2014, p. 864-867article number 6968042
Ahmed, Zubair; Sarfraz, Khawar; Zhang, Lining; Chan, Mansun
Conference paper

2013 1

Characterization of a low leakage current and high-speed 7T SRAM circuit with wide voltage margins

Proceedings - 2013 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013, IEEE Computer Society, 2013, p. 64-69article number 6654624
Sarfraz, Khawar; Kursun, Volkan
Conference paper

2011 1

A novel low-leakage 8T differential SRAM cell

2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011, 2011, p. 19-24article number 6081624
Sarfraz, Khawar
Conference paper

2010 1

Comparison of two SRAM matrix leakage reduction techniques in 45nm technology

2010 International Conference on Microelectronics, ICM'10, 2010, p. 367-370article number 5696162
Sarfraz, Khawar
Conference paper

Article 1

An Energy Efficient 4-bit SRAM Compute-in-Memory Macro With Tunable Reference Charge Injection SAR ADC

IEEE Transactions on Circuits and Systems I: Regular Papers, article number 11219665
Shah, Ikramullah; Zheng, Huimin; Abdullah, Murad; Sarfraz, Khawar; Chan, Mansun

Article 1

An Efficient 6TP SRAM-Based CIM Macro with Column ADCs for Binarized Neural Networks

IEEE Transactions on Circuits and Systems II: Express Briefs, v. 71, (5), p. 2509-2513
Shah, Ikramullah; Sarfraz, Khawar; Chan, Mansun

Conference paper 1

8.5 A Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm

2021 IEEE International Solid-State Circuits Conference, ISSCC 2021 - Digest of Technical Papers, Institute of Electrical and Electronics Engineers Inc., 2021, p. 134-136article number 9366063
Xu, Danfeng; Kou, Yu; Lai, Paul; Cheng, Zichuan; Cheung, Tze Yin; Moser, Larry; Zhang, Yang; Liu, Xiaolong; Lam, Man Pio; Jia, Haikun; Pan, Quan; Szeto, Wing Hong; Tang, Chi Fai; Mak, Ka Fai; Sarfraz, Khawar; Zhu, Tairan; Kwan, Ming; Au, Emily Yim Lee; Conroy, Cormac; Chan, Kai Keung

Article 2

A 1.2V-to-0.4V 3.2GHz-to-14.3MHz power-efficient 3-port register file in 65-nm CMOS

IEEE Transactions on Circuits and Systems I: Regular Papers, v. 64, (2), p. 360-372, article number 7775079
Sarfraz, Khawar; Chan, Mansun

A 140-mV Variation-Tolerant Deep Sub-Threshold SRAM in 65-nm CMOS

IEEE Journal of Solid-State Circuits, v. 52, (8), p. 2215-2220, article number 7954017
Sarfraz, Khawar; He, Jin; Chan, Mansun

Article 2

A compact low-power 4-port register file with grounded write bitlines and single-ended read operations

Integration, the VLSI Journal, v. 55, p. 12-21
Sarfraz, Khawar; Chan, Mansun

Modeling CNTFET Performance Variation Due to Spatial Distribution of Carbon Nanotubes

IEEE Transactions on Electron Devices, v. 63, (9), p. 3776-3781, article number 7517285
Ahmed, Zubair; Zhang, Lining; Sarfraz, Khawar; Chan, Mansun

Conference paper 3

A voltage-scalable zero-delay-overhead scheme for standby power reduction in dynamic register files

2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016, Institute of Electrical and Electronics Engineers Inc., 2016, article number 7869951
Sarfraz, Khawar; Chan, Mansun

Modeling spatial distribution induced variability in CNT array based FETs

Paper presented at 21st Asia and South Pacific Design Automation Conference (ASP-DAC 2016)
Chan, Man Sun; Sarfraz, Khawar; Zhang, Lining

Nanoscale register file circuit design - Challenges and opportunities

Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015 / edited by Ren Junyan; Tang Ting-Ao; Ye Fan; Yu Huihua. Institute of Electrical and Electronics Engineers Inc., 2016, article number 7516882
Sarfraz, Khawar; Chan, Mansun

Conference paper 3

A 65nm 3.2GHz 44.2mW Low-V_t register file with robust low-capacitance dynamic local bitlines

ESSCIRC 2015 - Proceedings of the 41st European Solid-State Circuits Conference / edited by Dielacher Franz; Pribyl Wolfgang; Hueber Gernot. IEEE Computer Society, 2015, p. 331-334article number 7313894
Sarfraz, Khawar; Chan, Mansun

An area-efficient 1.5-GHz dual-V_DD 4-port register file for real-time microprocessors

Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015, Institute of Electrical and Electronics Engineers Inc., 2015, p. 201-204article number 7285085
Sarfraz, Khawar; Chan, Mansun

Write ability enhancement techniques for L1 cache on next-generation IBM POWER^TM processors

Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015, Institute of Electrical and Electronics Engineers Inc., 2015, p. 621-624article number 7285192
Sarfraz, Khawar; Chan, Mansun

Conference paper 2

A low-noise local bitline technique for dual-Vt register files

2014 IEEE Faible Tension Faible Consommation, FTFC 2014, IEEE Computer Society, 2014, article number 6828602
Sarfraz, Khawar; Chan, Mansun

Low voltage SRAM design using tunneling regime of CNTFET

Proceedings of the IEEE Conference on Nanotechnology, Institute of Electrical and Electronics Engineers Inc., 2014, p. 864-867article number 6968042
Ahmed, Zubair; Sarfraz, Khawar; Zhang, Lining; Chan, Mansun

Conference paper 1

Characterization of a low leakage current and high-speed 7T SRAM circuit with wide voltage margins

Proceedings - 2013 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013, IEEE Computer Society, 2013, p. 64-69article number 6654624
Sarfraz, Khawar; Kursun, Volkan

Conference paper 1

A novel low-leakage 8T differential SRAM cell

2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011, 2011, p. 19-24article number 6081624
Sarfraz, Khawar

Conference paper 1

Comparison of two SRAM matrix leakage reduction techniques in 45nm technology

2010 International Conference on Microelectronics, ICM'10, 2010, p. 367-370article number 5696162
Sarfraz, Khawar

2017 2

A 1.2V-to-0.4V 3.2GHz-to-14.3MHz power-efficient 3-port register file in 65-nm CMOS

IEEE Transactions on Circuits and Systems I: Regular Papers, v. 64, (2), p. 360-372, article number 7775079
Sarfraz, Khawar; Chan, Mansun
Article

A 140-mV Variation-Tolerant Deep Sub-Threshold SRAM in 65-nm CMOS

IEEE Journal of Solid-State Circuits, v. 52, (8), p. 2215-2220, article number 7954017
Sarfraz, Khawar; He, Jin; Chan, Mansun
Article

2016 5

A compact low-power 4-port register file with grounded write bitlines and single-ended read operations

Integration, the VLSI Journal, v. 55, p. 12-21
Sarfraz, Khawar; Chan, Mansun
Article

Modeling CNTFET Performance Variation Due to Spatial Distribution of Carbon Nanotubes

IEEE Transactions on Electron Devices, v. 63, (9), p. 3776-3781, article number 7517285
Ahmed, Zubair; Zhang, Lining; Sarfraz, Khawar; Chan, Mansun
Article

A voltage-scalable zero-delay-overhead scheme for standby power reduction in dynamic register files

2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016, Institute of Electrical and Electronics Engineers Inc., 2016, article number 7869951
Sarfraz, Khawar; Chan, Mansun
Conference paper

Modeling spatial distribution induced variability in CNT array based FETs

Paper presented at 21st Asia and South Pacific Design Automation Conference (ASP-DAC 2016)
Chan, Man Sun; Sarfraz, Khawar; Zhang, Lining
Conference paper

Nanoscale register file circuit design - Challenges and opportunities

Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015 / edited by Ren Junyan; Tang Ting-Ao; Ye Fan; Yu Huihua. Institute of Electrical and Electronics Engineers Inc., 2016, article number 7516882
Sarfraz, Khawar; Chan, Mansun
Conference paper

2015 3

A 65nm 3.2GHz 44.2mW Low-V_t register file with robust low-capacitance dynamic local bitlines

ESSCIRC 2015 - Proceedings of the 41st European Solid-State Circuits Conference / edited by Dielacher Franz; Pribyl Wolfgang; Hueber Gernot. IEEE Computer Society, 2015, p. 331-334article number 7313894
Sarfraz, Khawar; Chan, Mansun
Conference paper

An area-efficient 1.5-GHz dual-V_DD 4-port register file for real-time microprocessors

Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015, Institute of Electrical and Electronics Engineers Inc., 2015, p. 201-204article number 7285085
Sarfraz, Khawar; Chan, Mansun
Conference paper

Write ability enhancement techniques for L1 cache on next-generation IBM POWER^TM processors

Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015, Institute of Electrical and Electronics Engineers Inc., 2015, p. 621-624article number 7285192
Sarfraz, Khawar; Chan, Mansun
Conference paper

2014 2

A low-noise local bitline technique for dual-Vt register files

2014 IEEE Faible Tension Faible Consommation, FTFC 2014, IEEE Computer Society, 2014, article number 6828602
Sarfraz, Khawar; Chan, Mansun
Conference paper

Low voltage SRAM design using tunneling regime of CNTFET

Proceedings of the IEEE Conference on Nanotechnology, Institute of Electrical and Electronics Engineers Inc., 2014, p. 864-867article number 6968042
Ahmed, Zubair; Sarfraz, Khawar; Zhang, Lining; Chan, Mansun
Conference paper

2013 1

Characterization of a low leakage current and high-speed 7T SRAM circuit with wide voltage margins

Proceedings - 2013 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013, IEEE Computer Society, 2013, p. 64-69article number 6654624
Sarfraz, Khawar; Kursun, Volkan
Conference paper

2011 1

A novel low-leakage 8T differential SRAM cell

2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011, 2011, p. 19-24article number 6081624
Sarfraz, Khawar
Conference paper

2010 1

Comparison of two SRAM matrix leakage reduction techniques in 45nm technology

2010 International Conference on Microelectronics, ICM'10, 2010, p. 367-370article number 5696162
Sarfraz, Khawar
Conference paper

No Publications

Teaching Assignment

2025-26 Fall 2 2024-25 Summer 0 2024-25 Spring 4 2024-25 Winter 1 2024-25 Fall 2 2023-24 Summer 0

EESM5000	CMOS VLSI Design
ELEC3410	CMOS VLSI Design

EESM5020	Digital VLSI System Design and Design Automation
EESM6970	Guided Chip Design Project
ELEC4900	Final Year Design Project
ELEC5160	Digital VLSI System Design and Design Automation

EESM6970

Guided Chip Design Project

EESM5000	CMOS VLSI Design
ELEC4410	CMOS VLSI Design

No Teaching Assignments

Research Postgraduate (RPG) Supervision

From January 2022 to December 2025 (As of 26 December 2025)

All Supervisions Current RPGs Graduated RPGs

Current RPGs

Doctor of Philosophy

ZHANG, Ce (co-supervision)
Electronic and Computer Engineering
SHAH, Ikramullah (co-supervision)
Electronic and Computer Engineering

Graduated RPGs

Master of Philosophy

ZHENG, Huimin (co-supervision)
Electronic and Computer Engineering( Completed in 2025 )

Research Interest

Publications

2025 1

2024 1

2021 1

2017 2

2016 5

2015 3

2014 2

2013 1

2011 1

2010 1

Article 1

Article 1

Conference paper 1

Article 2

Article 2

Conference paper 3

Conference paper 3

Conference paper 2

Conference paper 1

Conference paper 1

Conference paper 1

2017 2

2016 5

2015 3

2014 2

2013 1

2011 1

2010 1

Teaching Assignment

Research Postgraduate (RPG) Supervision

From January 2022 to December 2025 (As of 26 December 2025)

Current RPGs

Graduated RPGs

Projects

From January 2023 to December 2025

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